cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 1 / 9 mta020a01 q8 cyste k product specification dual n - channel enhancement mode power mosfet mta020a01 q8 features ? simple drive requirement ? low on - resistance ? fast switching speed ? dual n - ch mosfet package ? pb - free lead plating & halogen - free package equivalent circuit outline ordering information device package shipping mta020a01q8 - 0 - t3 - g sop - 8 ( pb - free lead plating and halogen - free package ) 2500 pcs / tape & reel mta020a01 q8 so p - 8 g gate s sour c e d drain pin 1 bv dss 14v i d @v gs =10v, t a =25 c 7a i d @v gs =10v, t a =70 c 5.6a r dson @v gs = 4 . 5 v, i d =7a 15.4 m (typ) r dson @v gs = 2 .5v, i d =5a 21.7m (typ) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13 reel product rank, zero for no rank products product name d2 d2 d1 1 d1 s1 g1 s2 g2 d2
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 2 / 9 mta020a01 q8 cyste k product specification absolute maximum ratings (ta=25 ? c) parameter symbol limits unit drain - sour c e voltage v ds 14 v gate - source voltage v gs 8 continuous drain current @ v gs =10v, t c =25 ? c i d 11.3 a continuous drain current @ v gs =10v, t c =100 ? c 7.2 continuous drain current @ v gs =10v, t a =25 ? c 7 (note 2) continuous drain current @ v gs =10v, t a =70 ? c 5.6 (note 2) pulsed drain current i dm 20 (note 1) power dissipation for dual operatio n p d 2 w power dissipation for single operation 1.6 (note 2) 0.9 (note 3) operating junction and storage temperature range tj, tstg - 55~+1 50 ? c thermal data parameter symbol value unit thermal re sistance, junction - to - case, max r jc 35 ? c /w thermal resistance, junction - to - ambient, max, dual r ja 62.5 thermal resistance, junction - to - ambient, max , single operation 78 (note 2) 135 (note 3) note : 1. pulse width limited by maximum junction te mperature 2. surface mounted on 1 in 2 copper pad of fr - 4 board, pulse width 10s. 3. surface mounted on minimum copper pad, pulse width 10s. characteristics (t j =25 ? symbol min. typ. ma x. unit test conditions static bv dss 14 - - v v gs = 0v , i d = 250 a v gs(th) 0.5 - 1.0 v ds = v gs , i d = 250 a g fs *1 - 9.8 - s v ds = 5v , i d = 7a i gss - - 100 n a v gs = 8v, v ds =0v i dss - - 1 a v ds = 14v, v gs =0v - - 25 v ds = 10v, v gs =0v, tj=70 ? c r ds ( on ) *1 - 15.4 22 m v gs = 4.5v , i d = 7a - 21.7 32 v gs = 2.5v , i d = 5a dynamic qg *1, 2 - 6.3 - nc v ds =10v, i d =7a, v gs =4.5v qgs *1, 2 - 0.7 - qgd *1, 2 - 2.7 - t d(on) *1, 2 - 5.6 - ns v ds =10v, i d =7a, v gs =5v, r g =3.3 tr * 1, 2 - 16 - t d(off) *1, 2 - 22.8 - t f *1, 2 - 9.8 -
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 3 / 9 mta020a01 q8 cyste k product specification ciss - 374 - pf v gs =0v, v ds =10v, f=1mhz co ss - 112 - crss - 96 - rg - 2.4 - f=1mhz source - drain diode i s *1 - - 2.3 a i sm *3 - - 9.2 v sd *1 - 0.88 1.2 v i s =7a, v gs =0v trr *1 - 10 - ns i f =7a, di f /dt=100a/ s qrr *1 - 1.4 - nc note : * 1. pulse test : pulse width ? 3 0 0s, duty cycle ? 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recomme nded soldering footprint
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 4 / 9 mta020a01 q8 cyste k product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 v ds , drain-source voltage(v) i d , drain current(a) 8v, 7v, 6v, 5v, 4v v gs =1.5v 2 .5 v 3 v 2 v brekdown voltage vs ambient temperature 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =2.5v v gs =4.5v v gs =1.8v v gs =3v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 2 4 6 8 10 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 0 1 2 3 4 5 6 7 8 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =7a drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =4.5v, i d =7a r ds(on) @ tj=25c : 15.4 m
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 5 / 9 mta020a01 q8 cyste k product specification typical characteris tics (cont.) capacitance vs drain-to-source voltage 10 100 1000 0 2 4 6 8 10 v ds , drain-source voltage(v) capacitance(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) pulsed ta=25c v ds =5v v ds =10v gate charge characteristics 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =7a v ds =10v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c,v gs =4.5v r ja =78c/w, single pulse 10s 1s maximum drain current vs junctiontemperature 0 1 2 3 4 5 6 7 8 9 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maxim um drain current(a) t a =25c, tj(max)=150c, v gs =4.5v r ja =78c/w, single pulse
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 6 / 9 mta020a01 q8 cyste k product specification typical characteristics (cont.) typical transfer characteristics 0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 v gs , gate-source voltage(v) i d , drain current(a) v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =78c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =78 c/w
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 7 / 9 mta020a01 q8 cyste k product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 8 / 9 mta020a01 q8 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temper ature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 073 q8 issued date : 20 16 . 07 . 04 revised date : 2016.10. 21 page no. : 9 / 9 mta020a01 q8 cyste k product specification so p - 8 dimension dim millimeters inches dim millimeters inches min. max. min. max. min. max. min. max. a 1.350 1.750 0.053 0.069 e 3.800 4.000 0.150 0. 157 a1 0.1 00 0. 250 0.004 0.010 e1 5.800 6 .200 0. 228 0. 244 a2 1.350 1.550 0.053 0.061 e 1.270 (bsc) 0.050 (bsc) b 0. 330 0. 510 0.013 0.020 l 0. 400 1.270 0. 016 0. 0 5 0 c 0. 170 0. 250 0. 006 0. 010 0 8 0 8 d 4.700 5.100 0.185 0.200 notes: 1. controlling dimension: millimeters. 2 . maximum l ead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves t he right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liability for any consequence of customer product design, infrin gement of patents, or application assistance. marking: 8 - lead so p - 8 plastic package cystek package code: q 8 date code device name a020 a01
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